This disclosure relates to integrated circuit design.
Some integrated circuits are prepared as a physical layout (for fabrication on a substrate) by a computerised layout system such as a so-called EDA (electronic design automation) tool.
The input to an EDA tool can comprise a coded definition of the logic functions and their interconnections to be implemented, and the EDA tool arranges appropriate modules or individual components on a design layout for fabrication as the integrated circuit, in order to achieve the required functionality defined by the coded representation. The coded definition may include multiple instances of electronic circuitry elements such as processor cores or the like.
In doing this, the EDA tool may have to take into account not only the required logic functionality, but also timing considerations so that data being passed from one component to another, or by one of the other interfaces from one instance of a circuitry element to another, complies with restrictions such as the need to complete a data transfer by a next-following clock edge and the like.